                1. Field of the Invention        
One or more aspects of the invention generally relate to memory subsystems and more particularly to a method and apparatus for dynamic power adjustment in a memory subsystem.
2. Description of the Related Art
Digital computers are used to perform a wide variety of tasks in business, industry, government, education, entertainment, and the home. Modern computers often incorporate powerful integrated circuits to implement complex functions such as 3-D graphics, voice recognition, and the like.
Because of the wide range of computer uses and applications, together with the cost constraints imposed by different users, computer manufacturers have had to produce computers with different capabilities to satisfy different market segments. This has often required different configurations of computer microprocessors, dedicated digital processors, memory, motherboards, input/output functions, display devices and power supplies. For example, while desktop computers can benefit by using higher power consumption to improve performance, in portable computers, low power consumption may be more important than high performance.
Presently, random access memory (RAM) devices, such as dynamic RAM (DRAM), are designed and tested for operation at a specific voltage. The assumption is that the system provides a stable voltage before initializing the DRAM and then keeps that voltage stable within a tolerance for the entire operation of the RAM. Significant deviation from the set voltage is expected to cause a failure. The problem with this approach is that high speed memories end up consuming a significant portion of the power budget in many systems. One method of reducing power consumption in a DRAM is to reduce the frequency of the memory clock signal. In some cases, however, the reduction in frequency does not provide for a sufficient reduction in power consumption. Also, to achieve a desired level of power consumption, the frequency may have to be reduced to so much that significant performance is lost.
As the foregoing illustrates, there exists a need in the art for dynamic power adjustment in a memory subsystem that provides power reduction with minimized impact on performance.